Introduction to FPGA

VHDL stands for “VHSIC (very high-speed integrated circuit) hardware description language.” It was originally sponsored by the U.S. Department of Defense and later transferred to the IEEE (Institute of Electrical and Electronics Engineers). The language is formally defined by IEEE Standard 1076. The standard was ratified in 1987 (referred to as VHDL 87), and revised several times.  This book mainly follows the revision in 1993 (referred to as VHDL 93).
VHDL is intended for describing and modeling a digital system at various levels and is an extremely complex language.  The focus of this book is on hardware design rather  than the language. Instead of covering every aspect of VHDL, we introduce the key VHDL  synthesis constructs by examining a collection of examples. Detailed VHDL coverage may be explored through the sources listed in the Bibliography.
In this chapter, we use a simple comparator to illustrate the skeleton of a VHDL program. The description uses only logical operators and represents a gate-level combinational circuit, which is composed of simple logic gates. In Chapter 3, we cover the more sophisticated VHDL operators and constructs and examine module-level combinational circuits, which are composed of intermediate-sized components, such as adders, comparators, and multiplexers.

Table 1.1  Truth table of a 1-bit equality comparator
input  output
iOil  eq
00  1
01  0
10  0
11  1